Plug-based floating gate memory

Details Plug-based floating gate memory Plug-based floating gate memory

1992-07-28

1994-01-25

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437203, 257315, H01L 2176, H01L 27115

Patent

active

052815480

ABSTRACT:
A device and a method of forming a floating gate memory transistor of very small area, thereby allowing a high-density integrated circuit chip, more specifically for Erasable Programmable Read-Only Memory (EPROM) or similar non-volatile devices.
In a first embodiment, a method is disclosed that fabricates a programmable memory cell described as a "diffusion cut" cell where a plug-type floating gate contact hole cuts through a diffusion region and partially into a substrate region. In a second embodiment, a method is disclosed that fabricates a programmable memory cell described as an "oxide cut" cell, where the plug-type floating gate contact hole only penetrates a silicon oxide layer. This "oxide cut" cell is formed in a similar fashion except penetration does not go into the diffusion region or substrate.

REFERENCES:
patent: 4964143 (1990-10-01), Haskell
patent: 4975384 (1990-12-01), Baglee
patent: 5045490 (1991-09-01), Esquivel et al.
patent: 5135879 (1992-08-01), Richardson
patent: 5141886 (1992-08-01), Mori

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