Processes for manufacturing a semiconductor device

Details Processes for manufacturing a semiconductor device Processes for manufacturing a semiconductor device

1992-01-30

1994-01-25

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 59, H01L 21265

Patent

active

052815455

ABSTRACT:
A Bi-CMOS ( Bipolar-Complementary Metal Oxide Silicon ) gate array includes bipolar transistors, and P-channel and N-channel MOS transistors all formed on the same single chip in the form of an array. Such a chip may provide desired bipolar and MOS transistor characteristics at the same time by itself.

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Zimmer et al., "A Fully Implanted NMOS, CMOS, Bipolar Technology for VSLI of Analog-Digital Systems," IEEE Trans. on Elec. Dev., vol. ED-26, No. 4, Apr. 1979, pp. 390-396.
Polinsky et al., "CMOS-Bipolar Monolithic Integrated-Circuit Tech." IEEE IEDM Technical Digest, Dec. 3-5, 1973, pp. 229-231.
Link et al. "Cmplementary MOS and Bipolar . . . on a single chip," Electronics, Aug. 31, 1970, pp. 72-76.

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