Priority circuit for channel subsystem having components with di

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G06F 304, G06F 918

Patent

active

046758127

ABSTRACT:
A priority circuit handles requests by three components of a data processing system for access to several resources of the system that can be accessed one at a time on each operating cycle of the system. A logic circuit receives requests by the requesters and grants access to one requester on a priority basis. The logic circuit has means for establishing a particular priority sequence, and the priority circuit includes means for stepping the logic circuit through a cycle of different priority sequences. In a repeating cycle of these steps, each requester is given the highest priority at least once. In a specific embodiment, the stepping means is a counter and a cycle is called a counting cycle. The stepping means is responsive to a control code to establish a particular stepping sequence. In a longer sequence, the lowest priority requester is given the highest priority once and higher priority requesters are given the highest priority several times so that in a complete cycle of steps the requesters have a different relative priority. In shorter cycles, the lowest priority requester is still given highest priority once and the higher priority requesters are given highest priority a few times so that in the shorter cycles the lowest priority requester has a higher relative priority. The priority circuit also includes means for matching a request for a resource with the availability of the resource so that a requester contends for priority only if the resource is in fact available.

REFERENCES:
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patent: 4130864 (1978-12-01), Schlotterer
patent: 4152764 (1979-05-01), Connors et al.
patent: 4181974 (1980-01-01), Lemay et al.
patent: 4374413 (1983-02-01), Comfort et al.
patent: 4385382 (1983-05-01), Goss et al.
patent: 4422142 (1983-12-01), Inaba et al.

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