Picture storage apparatus and graphic engine apparatus

Details Picture storage apparatus and graphic engine apparatus Picture storage apparatus and graphic engine apparatus

1995-04-12

1996-07-23

Bayerl, Raymond J.

395164, G06F 1516

Patent

active

055398731

ABSTRACT:
A memory M.sub.i has a storage capacity one-sixteenth of a memory capacity corresponding to the resolution of a display screen. A pixel processor XP.sub.i controls readout and writing of pixel data from or in memory M.sub.i via an input/output port IO.sub.1 and finds a number j of the pixel processor XP.sub.i of a destination area of pixel data to transfer pixel data read from memory M.sub.i via TBus 19 to pixel processor XP.sub.i of the destination area in the sequence of an increasing number j. The pixel data stored in memory M.sub.i is read out by raster scanning so as to be converted into RGB signals by a video processing circuit 17. A Braun tube 18 displays a picture based on the RGB signals.

REFERENCES:
patent: 4958303 (1990-09-01), Assarpour et al.
patent: 5341486 (1994-08-01), Castle
IEEE Computer Graphics and Applications, May 1991, No. 3. "Window Clipping Methods in Graphics Accelerators" by David Piredo, Hewlett-Packard Co.

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