Method and system for automated analysis of semiconductor defect

Details Method and system for automated analysis of semiconductor defect Method and system for automated analysis of semiconductor defect

1995-06-30

1996-07-23

Canney, Vincent P.

Excavating

364490, 364577, H04B 1700

Patent

active

055397522

ABSTRACT:
Method and a system for performing semiconductor manufacturing defect analysis in cooperation with wafer scanning tools. The system analyzes data associated with defects on a substrate. First, a subset of defects is selected from subpopulations of the defects according to preclassify rules, such that classification codes indicative of defect type may then be assigned to the selected defects based upon review thereof. Classification codes indicative of defect type are then randomly assigned to a number of unselected ones of the defects in each of the subpopulations, the number, for each defect type, being weighted according to the expected occurence of the defect type extrapolated from the selected defects of the same defect type.

REFERENCES:
patent: 3751647 (1993-08-01), Maeder et al.
patent: 4579455 (1986-04-01), Levy et al.
patent: 5111404 (1992-05-01), Kotami
patent: 5274434 (1993-12-01), Morioka et al.
patent: 5317380 (1994-05-01), Allemand
patent: 5430734 (1995-07-01), Gilson
patent: 5440649 (1995-08-01), Kiyasu et al.

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