Boots – shoes – and leggings
Patent
1985-08-19
1988-08-02
Malzahn, David H.
Boots, shoes, and leggings
364787, G06F 750
Patent
active
047617608
ABSTRACT:
For reduction in circuit complexity, there is disclosed a high speed digital arithmetic unit comprises a plurality of binary adders in cascade arrangement, each binary adder comprising carry lookahead means for generating a carry signal representative of an actual carry bit based on a segment of a first binary number, a corresponding segment of a second binary number and a carry signal fed from an adder located at a lower position, adding means for adding the segment of the first binary number to the corresponding segment of the second binary number in parallel operation with the carry lookahead means, the adding means simultaneously adding a suspense carry to a partial sum of the segments for generation of a temporary result, and final result determination means operative to generate a final result based on the partial sum in accordance with the actual carry fed from the lower adder.
REFERENCES:
patent: 3316393 (1967-04-01), Ruthazer
patent: 3993891 (1976-11-01), Beck et al.
patent: 4139894 (1979-02-01), Reitsma
patent: 4203157 (1980-05-01), Daniels
patent: 4525797 (1985-06-01), Holden
patent: 4639888 (1987-01-01), Nussbaecher
Richards, Arithmetic Operations in Digital Computers, D. Van Nostrand Company, Inc., 1955, pp. 113-114.
Malzahn David H.
NEC Corporation
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