Transmit data FIFO for flow controlled data

Details Transmit data FIFO for flow controlled data Transmit data FIFO for flow controlled data

1996-09-12

1999-09-28

Beausoliel, Jr., Robert W.

395877, G06F 1300

Patent

active

059602155

ABSTRACT:
A method and apparatus for transferring data units between a host memory and a peripheral interface, the data units being subject to a flow control mechanism whereby some of said data units are flow controlled and some of said data units are not. Two transmit buffer memories are coupled to the peripheral interface; one for storing controlled data units to be transferred to the peripheral interface and the other for storing uncontrolled data units to be transferred to the peripheral interface. A single request buffer stores successive requests for data to be transferred from a host memory to either of the two transmit buffer memories. Data transfer circuitry transfers data from the host memory to either of the two transmit buffer memories in response to the requests stored in the request buffer. The data transfer circuitry is prevented from transferring further data from the host memory to the transmit buffer memory storing the controlled data units when it is determined that there is not enough room in the transmit buffer memory storing the controlled data units to accommodate another data unit. The data transfer circuitry is allowed, however, to transfer further data from the host memory to the transmit buffer memory storing the uncontrolled data units.

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patent: 5602537 (1997-02-01), Dalrymple
patent: 5604866 (1997-02-01), Kolb et al.
patent: 5822612 (1998-10-01), Thomas et al.

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