Method of controlling oxide thinning in an EPROM or flash memory

Details Method of controlling oxide thinning in an EPROM or flash memory Method of controlling oxide thinning in an EPROM or flash memory

1993-10-28

1995-03-14

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437978, 437 49, 437985, 257316, 148DIG43, H01L 21265

Patent

active

053977254

ABSTRACT:
A method of fabricating an electrically-programmable read-only-memory (EPROM) or a flash memory array structure that controls oxide thinning to prevent shorts in the array and trenching of the bit lines is provided. The method includes the following steps. First, in accordance with conventional processing techniques, layers of gate oxide, polyl, ONO, poly cap, and nitride are sequentially deposited on the substrate. Next, in accordance with the present invention, a layer of thin poly is deposited on the layer of nitride. The thin poly
itride/poly cap/ONO/polyl layers are then etched to define thin poly
itride/poly cap/ONO/polyl parallel strips. Edge oxide is then formed on the thin poly
itride/poly cap/ONO/polyl strips. Following this, a layer of spacer oxide is formed over the layer of edge oxide. An anisotropic etch back of the layers of spacer oxide and edge oxide is then performed until the thin poly layer and the substrate are exposed. Next, a N-type dopant is introduced into the substrate material between the thin poly
itride/poly cap/ONO/polyl strips to define the N+ buried bit lines of the array. Optionally, a thin layer of edge oxide can be formed over the substrate prior to the introduction of the dopant. Following the formation of the buried bit lines, a layer of differential oxide is grown over the above-described structure and the process then continues according to conventional steps.

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patent: 5151375 (1992-09-01), Kazerounian
patent: 5204835 (1993-04-01), Eitan
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patent: 5240870 (1993-08-01), Bergemont
B. Eitan, R. Kazerounian and A. Bergemont, "Alternate Metal Virtual Ground (AMG)--A New Scaling Concept for Very High-Density EPROM's," IEEE Electron Device Letters, Aug. 1991, vol. 12, No. 8, pp. 450-452.

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