Method of forming an insulated gate semiconductor device

Details Method of forming an insulated gate semiconductor device Method of forming an insulated gate semiconductor device

1993-05-03

1995-03-14

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 6, 437177, 437179, H01L 21265

Patent

active

053977165

ABSTRACT:
A method of forming an insulated gate semiconductor device (10). A field effect transistor and a bipolar transistor are formed in a portion of a monocrystalline semiconductor substrate (11) that is bounded by a first major surface (12). A control electrode (19) is isolated from the first major surface by a dielectric layer (18). A first current conducting electrode (23) contacts a portion of the first major surface (12). A second current conducting electrode (24) contacts another portion of the monocrystalline semiconductor substrate (11) and is capable of injecting minority carriers into the monocrystalline semiconductor substrate (11). In one embodiment, the second current conducting electrode contacts a second major surface (13) of the monocrystalline semiconductor substrate (11).

REFERENCES:
patent: 5079607 (1992-01-01), Sakurai
patent: 5171696 (1992-12-01), Hagino
patent: 5178370 (1993-01-01), Clark et al.
patent: 5264378 (1993-11-01), Sakurai
patent: 5273917 (1993-12-01), Sakurai

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