Method and system for reducing the number of connections between

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364490, 3408255, H04L 2908

Patent

active

056255632

ABSTRACT:
Serial high speed interconnect devices are integrated with semiconductor devices to reduce the number of input-output pins required for communications and control between a plurality of semiconductor devices. The serial high speed interconnect devices transfer the data serially at a rate fast enough to replace large parallel data and address buses that require one conductive path per bit of data. Eliminating large parallel data and address buses allows the integrated circuit assembly containing the semiconductor device to be smaller, simpler and lower in cost. The subsequent reduction in the size of the integrated circuits improves the layout density of electronic systems and reduces crosstalk and other undesirable signal transfer anomalies. The serial high speed interconnection devices are implemented with a low cost serial interface logic technology that may be easily implemented on a semiconductor die in conjunction with the main logic circuits.

REFERENCES:
patent: 4276656 (1981-06-01), Petryk, Jr.
patent: 4509121 (1985-04-01), Rey et al.
patent: 4717914 (1988-01-01), Scott
patent: 4739323 (1988-04-01), Miesterfeld et al.
patent: 4885538 (1989-12-01), Hoenniger, III et al.
patent: 5039194 (1991-08-01), Block et al.
patent: 5060303 (1991-10-01), Wilmoth
patent: 5069522 (1991-12-01), Block et al.
patent: 5079770 (1992-01-01), Scott
patent: 5124980 (1992-06-01), Maki
patent: 5222062 (1993-06-01), Sharma et al.
patent: 5353334 (1994-10-01), O'Sullivan
patent: 5452419 (1995-09-01), Di Giulio et al.
"A General-Purpose Link Interface Chipset for Gigabit Rate Data Communication", by Yen et al., Globecom '92: IEEE Global Telecommunications Conference, 1992, pp. 197-200.
"Design and Simulation of a Serial-Link Interconnection Network for a Massively Parallel Computer System", by Sharif et al., IEEE, MASCOTS '94: Modeling, Analysis, and Simulation Int'l. Workshop, Jun. 1994, pp. 115-119.
"Distributed Multiplexers for an ROV Control and Data System", by Mellinger et al., IEEE, Oceans '94, 1994, pp. I-584--I-589.

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