Excavating
Patent
1991-03-20
1994-02-08
Atkinson, Charles E.
Excavating
371 471, 371 21, 375 34, G06F 1100
Patent
active
052854582
ABSTRACT:
An error suppression system suppresses an error of a data sequence generated in a transmission path between a transmitting terminal and a receiving terminal. The error suppression system includes a data coding circuit in the transmitting terminal for inserting a known bit at a predetermined position of the data sequence and for carrying out a difference logic conversion with respect to the data sequence, a differential coding circuit in the transmitting terminal for carrying out a sum logic conversion with respect to the data sequence which is received from the data coding circuit, a differential decoding circuit in the receiving terminal for carrying out a difference logic conversion with respect to the data sequence received from the differential coding circuit via the transmission path, and a data decoding circuit in the receiving terminal for carrying out a sum logic conversion with respect to the data sequence received from the differential decoding circuit and for restoring the known bit at the predetermined position of the data sequence.
REFERENCES:
patent: 3336467 (1967-08-01), Frey, Jr.
patent: 3398400 (1968-08-01), Rupp et al.
patent: 3471830 (1969-10-01), McRae et al.
patent: 3668632 (1972-06-01), Oldham, III
patent: 4530094 (1985-07-01), Sewerinson
patent: 4887269 (1989-12-01), Cominetti et al.
Atkinson Charles E.
Fujitsu Limited
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