Solid state delay device

Details Solid state delay device Solid state delay device

1982-03-29

1984-01-17

Thomas, James D.

Boots, shoes, and leggings

G06F 1302

Patent

active

044266855

ABSTRACT:
A solid state delay device for delaying digital data for short periods of me. Serial digital data is converted into parallel data and input to a number of parallel memory paths. The data is shifted through the memory paths by a clock synchronized with the data. The output of the memory path is reconverted to the original serial digital data delayed by the amount of time required to shift through the memory paths.

REFERENCES:
patent: 3439342 (1969-04-01), Barton
patent: 3957148 (1976-05-01), Milliser
patent: 3999165 (1976-12-01), Kita et al.
patent: 4052699 (1977-10-01), Micka

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