Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1983-05-05
1985-03-12
Roy, Upendra
Metal working
Method of mechanical manufacture
Assembling or joining
29576B, 29577C, 148 15, 148187, 357 43, 357 91, H01L 21225, H01L 21265, H01L 2704
Patent
active
045036039
ABSTRACT:
This invention provides a process for manufacturing a monolithic integrated solid-state circuit comprising at least one bipolar transistor (npn) and at least insulated-gate field-effect transistor (PMOS), in which the dopings of the regions (zones) (1, 4, 8; 2, 5, 6; 15, 16) are introduced into the one surface side of a semiconducting substrate (3) by employing photoresist masks and by way of ion implantation. Moreover, the process according to the invention makes use of an oxidation masking layer with a topmost disposed nitride layer, with the thickness and the composition thereof, either with or without the nitride layer, corresponding to the gate insulator layer. Parts of the oxidation masking layer are used as a masking for two ion implantation processes performed with different doses and energies during the implantation of dopings of the base region, while other parts of the oxidation masking layer serve as a stopping layer during the etching of the contact openings of the gate electrode down to the nitride layer through a foreign oxide layer (13), under which the implanted ions are activated at an increased temperature.
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IT&T Industries, Inc.
Lenkszus Donald J.
Roy Upendra
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