Fishing – trapping – and vermin destroying
Patent
1994-06-02
1999-09-21
Niebling, John
Fishing, trapping, and vermin destroying
437 6, 437 54, 437 59, H01L 21265, H01L 2170, H01L 2700
Patent
active
RE0363111
ABSTRACT:
A description is given of two versions of an integrated structure in the emitter switching configuration comprising a high-voltage bipolar power transistor and a low-voltage MOS power transistor. In the vertical MOS version, the emitter region of the bipolar transistor is completely buried, partly in a first N- epitaxial layer and partly in a second N- epitaxial layer; the MOS is located above the emitter region. The bipolar is thus a completely buried active structure. In the horizontal MOS version, in a N- epitaxial layer there are two P+ regions, the first, which constitutes the base of the bipolar transistor, receives the N+ emitter region of the same transistor; the second receives two N+ regions which constitute the MOS source and drain regions, respectively; the front of the chip is provided with metal plating to ensure the connection between the MOS drain and the bipolar emitter contacts.
REFERENCES:
patent: T892019 (1971-11-01), Sack
patent: 3544863 (1970-12-01), Price et al.
patent: 3580745 (1971-05-01), Kooi
patent: 3880676 (1975-04-01), Douglas et al.
patent: 4032956 (1977-06-01), Yagi et al.
patent: 4120707 (1978-10-01), Beasom
patent: 4151006 (1979-04-01), De Graaff et al.
patent: 4210925 (1980-07-01), Morcom et al.
patent: 4239558 (1980-12-01), Morishita et al.
patent: 4277794 (1981-07-01), Nuzillat
patent: 4311532 (1982-01-01), Taylor
patent: 4315781 (1982-02-01), Henderson
patent: 4344081 (1982-08-01), Pao et al.
patent: 4425516 (1984-01-01), Wanlass
patent: 4458408 (1984-07-01), Alonas et al.
patent: 4483738 (1984-11-01), Blossfeld
patent: 4523215 (1985-06-01), Iwatani
patent: 4667393 (1987-05-01), Ferla et al.
patent: 4721684 (1988-01-01), Musumeci
patent: 4780430 (1988-10-01), Musumeci et al.
patent: 4814288 (1989-03-01), Kimura et al.
patent: 4879584 (1989-11-01), Takagi et al.
patent: 4881119 (1989-11-01), Paxman et al.
patent: 4892836 (1990-01-01), Andreini et al.
patent: 4898836 (1990-02-01), Zambrano et al.
patent: 4935799 (1990-06-01), Mori et al.
patent: 4947231 (1990-08-01), Palara et al.
patent: 4969030 (1990-11-01), Musumeci et al.
patent: 5065213 (1991-11-01), Frisina et al.
patent: 5118635 (1992-06-01), Frisina et al.
patent: 5119161 (1992-06-01), Zambrano et al.
Blanchard, "A Power Transistor With an Integrated Thermal Feedback Mechanism," Master of Science Dissertation (1970).
Ferla Giuseppe
Frisina Ferruccio
Dutton Brian K.
Formby Betty
Groover Robert
Niebling John
SGS-Thomson Microelectronics S.R.L.
LandOfFree
Integrated high-voltage bipolar power transistor and low voltage does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated high-voltage bipolar power transistor and low voltage, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated high-voltage bipolar power transistor and low voltage will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-70106