Non-volatile memory device having optimized management of data t

Details Non-volatile memory device having optimized management of data t Non-volatile memory device having optimized management of data t

1997-03-07

1998-11-03

Nelms, David C.

Static information storage and retrieval

Interconnection arrangements

365 51, G11C 506

Patent

active

058318917

ABSTRACT:
A non-volatile memory device having optimized management of data transmission lines, having the particularity that it comprises at least one bidirectional internal bus that runs from one end of the memory device to the other, one or more source structures that exist externally and internally to the memory device, and a timer means. The timer means is adapted to time-control the independent and exclusive access of the external and internal source structures, within a same memory cycle, to the internal bus for the transmission of data, controls, and functions, from one end of the memory to the other over the internal bus.

REFERENCES:
patent: 5150467 (1992-09-01), Hayes et al.
patent: 5367480 (1994-11-01), Matsumiya
patent: 5369611 (1994-11-01), Miura
patent: 5584010 (1996-12-01), Kawai et al.
patent: 5619466 (1997-04-01), McClure
patent: 5633822 (1997-05-01), Campardo et al.
patent: 5646891 (1997-07-01), Okamoto

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