Boots – shoes – and leggings
Patent
1996-03-07
1998-11-03
Mai, Tan V.
Boots, shoes, and leggings
36472607, G06F 1714
Patent
active
058318828
ABSTRACT:
When adding a first data and a second data, a selection circuit outputs the first data and a constant number 1 to a multiplication circuit and the second data to an addition circuit. When subtracting the second data from the first data, the selection circuit outputs the first data and a constant number -1 to the multiplication circuit and the second data to the addition circuit. When multiplying the first data by the second data, the selection circuit outputs the first data and the second data to the multiplication circuit and a constant number zero to the addition circuit. The multiplication circuit multiplies two input values and outputs a result to the addition circuit. The addition circuit adds the two input values.
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Texas Instruments, "Third-Generation TMS320 User's Guide", Digital Signal Processor Products (undated).
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NEC, MOS Integrated Circuit PD77230A-003 (undated).
Mai Tan V.
NEC Corporation
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