Non-volatile semiconductor memory device

Static information storage and retrieval – Floating gate – Particular biasing

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Details

36518511, 365218, G11C 1300

Patent

active

058154418

ABSTRACT:
A non-volatile semiconductor memory device includes an EEPROM array section and a flash memory array section formed on a single chip. The EEPROM memory array section is subjected to a bite-by-bite mode erasure whereas the flash memory array section is subjected to a batch mode erasure. The floating gate of the EEPROM array section has a large area than the floating gate of the flash memory array section.

REFERENCES:
patent: 5530828 (1996-06-01), Kaki et al.
patent: 5648929 (1997-07-01), Miyamoto
patent: 5687117 (1997-11-01), Chevallier et al.

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