Three-terminal devices with wide Josephson junctions and asymmet

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity

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257 36, 257 39, 505162, 505170, 505832, 505859, 505861, 326 3, 327367, 327528, 365162, H01L 2906, H01L 310256, H01L 3922, H03K 1792

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058312781

ABSTRACT:
A three-terminal device constructed from a Josephson junction with one or more asymmetric control lines is disclosed. The device is constructed with high temperature superconducting materials. The junction can be a bicrystal, SNS (Superconducting-Normal-Superconducting) or any other type of high temperature superconductor junction. The control line is either a conducting or superconducting material which is electrically isolated from the junction but inductively coupled into the junction. A portion of the control line is approximately directly above the junction and has current which at least partially flows parallel or nonparallel to current flowing across the junction. The control line current alters the magnetic field within the junction which changes the critical current of the junction. The junction is in a superconducting or resistive state depending on whether the bias current of the junction is greater than or less than the control current. Logic gates, including an XOR gate, are formed using this device and one or more control lines.

REFERENCES:
patent: 3643237 (1972-02-01), Anacker
patent: 3758795 (1973-09-01), Anacker et al.
patent: 3784854 (1974-01-01), Herrell
patent: 3886382 (1975-05-01), Cain
patent: 3913027 (1975-10-01), Zappe
patent: 3943383 (1976-03-01), Hamel
patent: 4423430 (1983-12-01), Hasuo et al.
patent: 5106823 (1992-04-01), Creuzet et al.
patent: 5162298 (1992-11-01), Chaudhari et al.
patent: 5347143 (1994-09-01), Schroder
patent: 5358928 (1994-10-01), Ginley et al.
patent: 5696392 (1997-12-01), Char et al.
Kadin, A.M., "Duality and Fluxonics in Superconducting Devices," J. Appl. Phys., (68)11, (Dec. 1990), pp. 5741-5749.
Broom, R.F., Kotyczka, W., & Moser, A., "Modeling of Characteristics for Josephson Junctions Having Nonuniform Width or Josephson Current Density," IBM J. Res. Develop., 24(2), pp. 178-187, (Mar. 1980).
Gerdemann, R., Alff, L., Beck, A., Froehlich, O.M., Mayer, B., & Gross, R., "Josephson Vortex-Flow Transistors Based on Parallel Arrays of Yba.sub.2 Cu.sub.3 O.sub.7-x Bicrystal Grain Boundary Junctions," ASC '94 (Oct. 1994).
Gerdemann, R., Bauch, T., Frohlich, O.M., Alff, L., Beck, A., Koelle, D., & Gross, R., "Asymmetric high temperature superconducting Josephson vortex-flow transistors with high current gain," Appl. Phys. Lett., 67(7), 1010-1012 (Aug. 1995).
Gueret, P., Moser, A., & Wolf, P., "Investigations for a Josephson Computer Main Memory with Single-Flux-Quantum Cells," IBM J. Res. Develop., 24(2), 155-166, (Mar. 1980).
Matisoo, J., "Overview of Josephson Technology Logic and Memory," IBM J. Res. Develop., 24(2), 113-129 (Mar. 1980).
Mizugaki, Y., Nakajima, K., & Yamashita, T., "Flip-flop circuits using dc-biased coupled-SQUID gates," Research Institute of Electrical Communications, (preprint, date uncertain, est. 1995).
Zhang, Y.M., Winkler, D., Nilsson, P.A., Claeson, T., "Flux-flow transistors based on long Yba.sub.2 Cu.sub.3 O.sub.7-x bicrystal grain boundary junctions," Appl. Phys. Lett, 64(9), 1153-1155 (Feb. 1994).
Koelle, D., Kleiner, R., Ludwig, F., Miklich, A.H., Dantsker, E., & Clarke, J., "Asymmetric YBa.sub.2 Cu.sub.3 O.sub.7-x dc SQUID: A three terminal device with current gain at 77K," Appl. Phys. Lett., 66(5) 640-642 (Jan. 1995).
Raissi, F., & Nordman, J.E., "Josephson fluxonic diode," Appl. Phys. Lett., 65(14), 1838-1840 (Oct. 1994).
Workpart Summaries, European Union ESPRIT Basic Research Project 7100 and the Bundesminister for Forschung and Technologie (project no. 13N6434) Report, 1994.
Rosenthal et al.. "Flux focusing effects in panar thin-film grain-boundary Josephson junctions," Appl. Phys. Lett., 59(26) 3482-3484 (Dec. 1991).
Solymar, L., "Superconductive Tunnelling and Applications," Wiley-Interscinece, 247-248 (1972).
Berman, D. et al., "Discrete Superconducting Vortex Flow Transistors," IEEE Trans. on Appl. Superconductivity, vol. 4, No. 3, (Sep. 1994), pp. 161-168.
Bock, R.D., "Influence of induced magnetic fields on the static properties of one-dimensional parallel Josephson-junction arrays," vol. 49, No. 14, Phys. Rev. B, (Apr. 1994), p. 10009-10012.
Fulton, T.A., et al., "The Flux Shuttle--A Josephson Junction Shift Register Employing Single Flux Quanta," Proc. of the IEEE, 61(1) (Jan. 1983), pp. 28-35.
Burns, M. J., et al., "Transport Measurements of Grain Boundary Flux-Flow Transistors," Bull. Am. Phys. Soc, 37, 563 (Mar. 1992).
Zhang et al., "RF Characterization of Josephson Flux-Flow Transistors: Design, Modeling, and On-Wafer measurement," IEEE Transactions on Applied Superconductivity, vol. 5 No. 2, pp. 3385-3388, Jun. 1995.
Gerdemann et al., "Josephson Vortex-Flow Transistors Based on Parallel Arrays of YBa2Cu3O7-x Bicrystal Grain Boundary Junctions," IEEE Transactions on Applied Superconductivity, vol., 5, No. 2, pp. 3292-3295, Jun. 1995.
Martens et al. "The RF Performance of Long Junction Active Devices Using TlCaBaCuO Step Edge Structures," IEEE Transactions on Applied Superconductivity, vol. 2, No. 2, pp. 74-78, Jun. 1992.
Herrell et al. "Self-Resetting Logic Circuit", IBM Technical Disclosure Bulletin, vol. 17, No. 4, pp. 1204-1205, Sep. 1974.
Gheewala, "Control of Resonance Amplitude for Josephson Logic", IBM Technical Disclosure Bulletin, vol. 24, No. 1A, pp. 270-272, Jun. 1981.
Gheewala, "One Device AND Gate", IBM Technical Disclosure Bulletin, vol. 21, No. 11, pp. 4697-4698, Apr. 1979.
Basavaiah et al., "Obtaining Improved Josephson Gate Characteristics for Use in Logic Circuits", IBM Technical Bulletin, vol. 16, No. 5, pp. 1464-1465, Oct. 1973.
Schuenemann, "Complementary Current Switch Logic", IBM Technical Disclosure Bulletin, vol. 17, No. 8, p. 2447, Jan. 1975.
Herrell, "NOR-OR Gate for Josephson Tunneling Memory", IBM Technical Disclosure Bulletin, vol. 17, No. 1, pp. 261-263, Jun. 1974.
Jutzi, "Josephson Logic Gate", IBM Technical Disclosure Bulletin, vol. 15, No. 12, p. 3899, May 1973.

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