Memory with variable write driver operation

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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Details

36523008, G11C 800

Patent

active

058986391

ABSTRACT:
A memory is described which includes circuitry to modify the operation of a write driver circuit in a memory device in response to a command to close an accessed memory location. The memory includes a write driver circuit for actively driving a data signal during a portion of a write operation. The write driver operation is selectively modified to simultaneously operate with a sense amplifier to complete a write operation prior to closing an accessed row of the array.

REFERENCES:
patent: 5400289 (1995-03-01), Blodgett
patent: 5455801 (1995-10-01), Blodgett et al.
patent: 5615149 (1997-03-01), Kobayashi et al.
patent: 5657292 (1997-08-01), McClure
patent: 5703813 (1997-12-01), Manning et al.

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