Process and system for transmitting a refresh signal to a semico

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365222, G06F 946, G11C 700

Patent

active

046352244

ABSTRACT:
A method and system are provided for the transmission of a refresh signal to a semiconductor memory connected with a central computer bus with predetermined transmission priority, the refresh signal and a refresh repeat signal which determines the chronological transmission of the refresh signal, being transmitted to the memory by a central processing unit at a predetermined priority in relation to other aggregates connected to the computer bus. According to the invention, the refresh repeat signal is split into at least two chronologically successive signals during the first component signal, and the refresh signal is transmitted to the computer bus during transmission of the first component at low priority, transmission of the refresh signal not being possible during the first component, and the refresh signal being placed on the computer bus on a higher priority during the second component signal.

REFERENCES:
patent: 4106108 (1978-08-01), Cislaghi et al.
patent: 4133051 (1979-01-01), Gentili
patent: 4339808 (1982-07-01), North

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