Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1985-07-12
1987-01-06
Groody, James J.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358 36, 358166, H04N 5213
Patent
active
046351205
ABSTRACT:
A noise reduction circuit for a video signal comprises a plurality of circuit parts coupled in series and a control circuit. Each of the circuit parts comprises a delay circuit for delaying an input video signal supplied thereto, a first subtracting circuit for subtracting an output signal of the delay circuit from the input video signal, a limiter circuit for limiting the amplitude of an output signal of the first subtracting circuit, and a second subtracting circuit for subtracting an output signal of the limiter circuit from the input video signal and for producing a signal which is reduced of a noise component within the input video signal. The delay circuit in each of the circuit parts has a different delay time in accordance with a kind of correlation existing in information contents of the input video signal. The control circuit comprises a plurality of detecting circuits provided in correspondence with the circuit parts and a control signal supplying circuit. Each of the detecting circuits is supplied with the output signal of the first subtracting circuit of a corresponding circuit part and detects large amplitude signal components thereof.
REFERENCES:
patent: 4035735 (1977-07-01), Akashi et al.
patent: 4434438 (1984-02-01), Rzeszewski
patent: 4457007 (1984-06-01), Gutleber
patent: 4459700 (1984-07-01), Kretschmer, Jr. et al.
patent: 4563704 (1986-01-01), Hirota
Groody James J.
Meller Michael N.
Smith Cynthia
Victor Company of Japan Ltd.
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