1983-06-28
1987-01-06
James, Andrew J.
357 231, 357 41, 357 59, 357 49, 357 29, H01L 2994, H01L 2946
Patent
active
046350853
ABSTRACT:
The soft-error in an MOS d-RAM can be reduced by an impurity-doped region having a conductivity opposite to that of a substrate. The impurity-doped region is formed in the substrate and below and in contact with a field oxide layer formed on the substrate, for collecting minority carriers produced by incident radiation. A storage capacitor is formed on the field oxide layer for shielding the minority carriers. This device has the further advantage of not decreasing the density of a memory cell array.
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McNutt, "Buried Channel Charge Transfer Device (CTD) Transient Radiation Hardening Using N-P-N Structures", IEEE Trans. on Nuclear Sci., vol. NS-27, No. 5, Oct. 1980, pp. 1338-1342.
Minato et al, "2K.times.8 Bit Hi-CMOS Static Ram's", IEEE Trans. on Elec. Devices, vol. ED-27, No. 8, Aug. 1980, pp. 1591-1595.
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Fujitsu Limited
James Andrew J.
Small, Jr. Charles S.
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