Multiprocessor system having a shared memory for enhanced interp

Details Multiprocessor system having a shared memory for enhanced interp Multiprocessor system having a shared memory for enhanced interp

1984-10-24

1987-06-16

Williams, Archie E.

Boots, shoes, and leggings

370 94, 379284, G06Z 1200, G06Z 1556, H04T 324

Patent

active

046740333

ABSTRACT:
A multiprocessor system consisting of a plurality of slave processors and a master processor each connected by a bus to a common memory. Message transfers are implemented by the master which scans one-byte areas in the common memory-each slave processor only being able to load a pointer to one said one-byte areas.
Contention problems are prevented because once a remote processor has loaded information to its one byte area it must pass control of the bus to another processor. The system is fast because the master does not waste time looking at empty memory.

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