Semiconductor device having upper and lower wiring layers

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257761, 257763, 257764, 257765, H01L 2348, H01L 2352, H01L 2940

Patent

active

058982213

ABSTRACT:
A semiconductor device having a semiconductor substrate and a wiring layer, which is doped with an impurity, located on the substrate. The semiconductor device has upper and lower wiring layers apart from each other. An electric insulating film electrically insulates between the upper and lower wiring layers. The insulating film has a contact hole. A wiring material is packed with the contact hole to electrically connect the upper and lower wiring layers. The impurity is contained in the lower wiring layer to decrease its resistivity.

REFERENCES:
patent: 4914056 (1990-04-01), Okumura
patent: 5278448 (1994-01-01), Fujii
patent: 5414301 (1995-05-01), Thomas
patent: 5635763 (1997-06-01), Inoue et al.
patent: 5745990 (1998-05-01), Lee et al.

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