Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Patent
1997-03-24
2000-02-29
Ballato, Josie
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
324765, 324617, G01R 3128
Patent
active
060313854
ABSTRACT:
A method and an apparatus for testing compensated input/output buffers. In one embodiment, a compensated input/output buffer includes a node from which a plurality of compensation devices are coupled in parallel to a particular voltage level, such as for example V.sub.CC or ground. Compensation control signals are received by each one of the compensation devices such that the compensation signals are configured to selectively switch on and off each one of the plurality of compensation devices. An input/output test bus is coupled to the node and thus has access to each one of the compensation devices. Test circuitry is configured to selectively switch on and off each one of the compensation devices such that a switchable conductive path is formed from the node to the particular potential level through each one of the plurality of compensation devices. By observing the switchable conductive paths through each respective compensation device from the input/output test bus, proper functionality of the compensation devices in the compensated input/output buffer is verified.
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Gabara TJ et al.: Forming Damped LRC Parasitic Circuits in Simultaneously Switched CMOS Output Buffers, IEEE J of Solid-State Circuits, vol. 32(3), Mar. 1997.
Ballato Josie
Intel Corporation
Solis Jose M.
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