Method, system, and apparatus for automatically designing logic

Details Method, system, and apparatus for automatically designing logic Method, system, and apparatus for automatically designing logic

1994-09-02

1997-02-04

Trans, Vincent N.

Boots, shoes, and leggings

364754, 364757, G06F 1750

Patent

active

056005695

ABSTRACT:
With respect to each bit of a multiplier factor, it is judged whether or not the multiplier factor is a variable or a constant. If the multiplier factor is a constant, it is judged whether or not a bit of concern in the multiplier factor has the value of 1. Only if the bit of concern in the multiplier factor is 1, there is generated a circuit for outputting, as a partial product, a signal indicating a multiplicand. The signal indicating the multiplicand is then shifted by one bit so that the resulting signal is newly set as the signal indicating the multiplicand. By repeatedly executing the foregoing process with respect to all the bits of the multiplier factor, a circuit for calculating a partial product with respect to each bit of the multiplier factor is generated.

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Patent Abstracts of Japan, vol. 18, No. 606 (P-1827) (Aug. 12, 1994).
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