Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates
Patent
1997-12-15
2000-02-29
Dang, Trung
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
438403, 438406, 148DIG12, H01L 2130
Patent
active
060308842
ABSTRACT:
Prior to a heat treatment for bonding a III-V group compound semiconductor layer on a silicon substrate, a thermal stress relaxation layer is provided between the silicon layer and the III-V group compound semiconductor layer thermal stress relaxation layer, having a thermal expansion coefficient equal or near to the thermal expansion coefficient of the III-V group compound semiconductor layer and having a rigidity coefficient being sufficiently large to suppress generation of any crystal defects in the III-V group compound semiconductor layer due to a thermal stress generated in the heat treatment and subsequent cooling stage by the difference in the thermal expansion coefficient between the III-V group compound semiconductor layer and the silicon layer.
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Dang Trung
NEC Corporation
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