Patent
1995-07-20
1998-05-05
Harrell, Robert B.
G06F 1310
Patent
active
057489092
ABSTRACT:
An interface board (2a) includes an instruction processing device (11), a board bus (4) and devices (6, 7, 8). The instruction processing device selects instructions provided on an extension bus (3) and provides them to each of the devices. This selection is made on the basis of addresses corresponding to the respective devices, which belong to an address space assigned to the entirety of the interface board (2a). Use of the board bus (4) keeps the extension bus (3) away from effects of data transfer within the interface board (2a), which requires no local CPU and which does not degrade performance of the entire system.
REFERENCES:
patent: 5600801 (1997-02-01), Parks et al.
Harrell Robert B.
Mitsubishi Denki & Kabushiki Kaisha
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