Process for fabricating small geometry semiconductive devices in

Details Process for fabricating small geometry semiconductive devices in Process for fabricating small geometry semiconductive devices in

1975-08-20

1977-09-20

Truhe, J. V.

Electric heating

Metal heating

By arc

B23K 900

Patent

active

040499448

ABSTRACT:
Disclosed is a process for fabricating small geometry electronic devices, including a variety of integrated optical devices. The process includes the steps of holographically exposing a resist masking layer to a plurality of optical interference patterns in order to develop a masking pattern on the surface of a semiconductive body. Thereafter, regions of the body exposed by openings in the masking pattern are ion beam machined to thereby establish very small dimension undulations in these regions. These closely spaced undulations have a variety of uses in optical devices as will be described. The present invention is not limited to the geometry control of semiconductive structures, and may also be used in the geometry control of metallization patterns which have a variety of applications, or the geometry control of any ion beam sensitive material.

REFERENCES:
patent: 3340377 (1967-09-01), Okazaki et al.
patent: 3623798 (1971-11-01), Sheridon
patent: 3705060 (1972-12-01), Stork
patent: 3860783 (1975-01-01), Schmidt et al.
"Efficient Wire-Grid Duplexer Polarizer for CO.sub.2 Lasers," P. K. Cheo et al., Applied Physics Letters, vol. 18, No. 12, pp. 565-567, 6-1971.
"Thin-Film Distributed-Feedback Laser Fabricated by Ion Milling", D. P. Schinke et al., Appl. Phys. Lett., vol. 21, No. 10, 8-1972.

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