1995-01-31
1998-02-03
Donaghue, Larry D.
39520021, G06F 1712, G06F 1716
Patent
active
057154716
ABSTRACT:
A parallel computer includes a sequence of adjacent nodes, with each node including at least first and second processing elements and each processing element including a memory. The nodes are sequentially added or replaced in a node order and the processing elements are sequentially connected to form a single ring data path. First matrix data elements are sequentially assigned to adjacent processing elements along the single ring data path and second matrix data element groups are sequentially assigned to processing elements in the node order. The first matrix data elements are then accumulated with the second matrix data element groups as the first matrix data elements are rotated along the single ring data path. Accordingly, accumulation results are maintained within the memories of the lowest order nodes such that the nodes may added or replaced without relocation of data.
REFERENCES:
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patent: 4591981 (1986-05-01), Kassabov
patent: 4663706 (1987-05-01), Allen et al.
patent: 4763247 (1988-08-01), Borovski et al.
patent: 5274832 (1993-12-01), Khan
patent: 5465375 (1995-11-01), Thepaut et al.
Fujimoto Katsuhito
Otsuka Tatsushi
Yoshizawa Hideki
Donaghue Larry D.
Fujitsu Limited
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