Method of making a semiconductor memory device

Details Method of making a semiconductor memory device Method of making a semiconductor memory device

1991-12-16

1993-02-02

Thomas, Tom

Fishing, trapping, and vermin destroying

437 38, 437 47, 437 48, 437 60, 437203, 437919, H01L 2170

Patent

active

051837749

ABSTRACT:
A semiconductor memory device comprises a semiconductor substrate (10), a trench (12) formed on a main surface (11) of the semiconductor substrate, a gate region (15) formed on a main surface portion in the trench, a passive element region (16) formed on a bottom side portion of the trench and a source/drain region (20) formed on the main surface of the semiconductor substrate. The method for manufacturing the semiconductor memory device comprises the steps of forming a wide first trench (31) on a portion of the main surface of the semiconductor substrate, forming a narrow second trench (32) on the bottom portion of the first trench, forming a passive element region in the second trench, forming a gate region in the first trench, and forming a source/drain region on the main surface portion of the semiconductor substrate.

REFERENCES:
patent: 4651184 (1987-03-01), Malhi
patent: 4672410 (1987-06-01), Miura et al.
patent: 4737829 (1988-04-01), Monmoto et al.
patent: 4751557 (1988-06-01), Sunami et al.
patent: 4876215 (1989-10-01), Hsu
IEDM 84: "A Folded Capacitor Cell for Future Megabit DRAMs", by M. Wada et al., 9.5, 1984, pp. 244-247.
IEDM 85: "A Trench Transistor Cross-Point DRAM Cell", by W. F. Richardson et al., 29.6, 1985, pp. 714-717.
IEDM 84: "Buried Isolation Capacitor (BIC) Cell for Megabit MOS Dynamic RAM", by K. Nakamura et al., 9.3, 1984, pp. 236-239.

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