Integrable semiconductor circuit with a negatively fed-back, non

Details Integrable semiconductor circuit with a negatively fed-back, non Integrable semiconductor circuit with a negatively fed-back, non

1982-03-18

1984-04-03

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307494, 307503, H03K 1774, G06G 710

Patent

active

044410409

ABSTRACT:
Integrable semiconductor circuit, including a negatively fed-back non-inverting operational amplifier, a first resistor connected between the signal output and the inverting input of the amplifier, a second resistor connected to the inverting input, first and second capacitors, the second capacitor being connected between the second resistor and reference potential, forming a voltage divider including the first and second resistors and the second capacitor connected between reference potential and the output of the amplifier with a first circuit point disposed between the second resistor and the second capacitor connecting the inverting input of the operational amplifier to reference potential, an operating potential source connected to one of the supply inputs of the amplifier and the other supply input being connected to reference potential together supplying the amplifier with a supply voltage, series-connected resistors having a second circuit point disposed therebetween, the resistors being connected between the operating potential source and the non-inverting input, a fifth resistor connected between the second circuit point and reference potential, and the first capacitor being connected in parallel with the fifth resistor, comprising an auxiliary d-c voltage source having a first pole connected to reference potential, first and second diodes each having an anode connected to the second pole of the d-c voltage source, one of the series-connected resistors being additionally connected between the cathode of the first diode and the non-inverting input of the amplifier, and the cathode of the second diode being connected to the first circuit point.

REFERENCES:
patent: 4236126 (1980-11-01), Wollor et al.
patent: 4398104 (1981-08-01), Podhrasky
Siemens Datenbuch, pp. 556 and 557, 1980/81.

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