Isolation of regions in a CMOS structure using selective epitaxi

Details Isolation of regions in a CMOS structure using selective epitaxi Isolation of regions in a CMOS structure using selective epitaxi

1987-12-09

1989-04-11

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437090, H01L 21316, H01L 21318, H01L 2132

Patent

active

048206547

ABSTRACT:
A process for forming trench-like isolation structures situated in a semiconductor substrate between adjacent regions of substrate and epitaxial silicon. The trench-like structures include a relatively thick high dielectric constant material enclosed by a relatively thinner pad/buffer dielectric layer. The fabrication of the trench-like isolation regions commences with the formation of recesses with substantially vertical sidewalls into the silicon substrate, the conformal deposition of the relatively thin pad dielectric, and the conformal deposition of a relatively thicker high dielectric constant material. Anisotropic etching is then applied to retain the two dielectric layers along the vertically disposed walls of the recesses. A second conformal deposition of thin pad dielectric, followed by anisotropic etch to expose the substrate at the bottoms of the recesses, results in a sidewall structure with a high dielectric constant material enclosed within pad dielectric material. Selective epitaxial growth of semiconductor from the exposed substrate at the bottoms of the recesses is continued until the recess is substantially full. A planarization of the concluding structure produces trench-like dielectric filled regions of relatively narrow dimension and potentially deep penetration between adjacent substrate and epitaxial semiconductor regions.

Affiliated with

Also associated with

Rating

Isolation of regions in a CMOS structure using selective epitaxi does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Isolation of regions in a CMOS structure using selective epitaxi, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Isolation of regions in a CMOS structure using selective epitaxi will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-667039