Electricity: measuring and testing – Conductor identification or location – Inaccessible
Patent
1988-10-28
1989-10-03
Eisenzopf, Reinhard J.
Electricity: measuring and testing
Conductor identification or location
Inaccessible
324 64, G01R 2714
Patent
active
048719625
ABSTRACT:
A method is disclosed for measuring or verifying the size of an opening such as a via in a layer of material such as found in an integrated circuit structure which comprises measuring the voltage drop while flowing a known current across a given length of a first rectangular test portion comprising a continuous layer of a material capable of carrying an electrical current, then measuring the voltage drop while flowing the same known current across the same length of a second rectangular test portion comprising another portion of the same layer of material and of identical width and measured length as the first test portion but with one or more openings formed therein, and determining the size of the one or more openings in the second test pattern from the measured difference in voltage drops between the first and second test patterns reflecting the difference in resistance between the solid test portion and the test portion containing the openings. The size of the openings in the second test pattern are determined by using the measured voltage drops together with the measured sheet resistance of the conductive material.
REFERENCES:
patent: 3392324 (1968-07-01), Hermann et al.
patent: 4516071 (1985-05-01), Buehler
patent: 4697142 (1987-09-01), Frushour
Bane, Randy, "Getting Plugged into Electrical Linewidth Measurements", Test and Measurement World, Apr. 1987, pp. 102-108.
Buehler, M. G. et al., "Bridge and van der Pauw Sheet Resistors for Characterizing the Line Width of Conducting Layers", Journal of Electrochemical Society: Solid-State Science and Technology, vol. 125, No. 4, Apr. 1978, pp. 650-655.
"Brochure Insert #01", Prometrix Product Information Brochure, Prometrix Corp. of Santa Clara, CA, Jul. 1987.
IBM Technical Disclosure, vol. 23, No. 9, Feb. 1981, "Testing Printed Circuitry", Meier.
Advanced Micro Devices , Inc.
Eisenzopf Reinhard J.
Regan Maura K.
Taylor John P.
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