Process for simultaneously fabricating an insulated gate field-e

Details Process for simultaneously fabricating an insulated gate field-e Process for simultaneously fabricating an insulated gate field-e

1994-04-15

1995-04-18

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 59, 148DIG9, H01L 21265

Patent

active

054078440

ABSTRACT:
An insulated-gate field-effect transistor (426, 452) has reduced gate oxide stress. According to one embodiment, the control gate (458) has a doped region (460) adjacent the source end of the transistor (452), and an undoped dielectric portion (462) adjacent the gate end. According to another embodiment, the drain end of the conductive gate (434) is disposed on top of a thick insulator region (432) that also acts to mitigate the high electric fields present when the transistor is subjected to a high voltage transient.

REFERENCES:
patent: 4270137 (1981-05-01), Coe
patent: 4403395 (1983-09-01), Curran
patent: 4819045 (1989-04-01), Murakami
patent: 4939099 (1990-07-01), Seacrist et al.
patent: 5031008 (1991-07-01), Yoshida
patent: 5066602 (1991-11-01), Takemoto et al.
patent: 5086332 (1992-02-01), Nakagawa et al.
patent: 5288652 (1994-02-01), Wang et al.

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