Method for manufacturing lateral bipolar transistors

Fishing – trapping – and vermin destroying

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437 32, 437917, 148DIG10, H01L 21265

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active

054078431

ABSTRACT:
Method for manufacturing lateral bipolar transistors on a SOI substrate, whereby a basic doping for the conductivity type of emitter and collector is produced in the silicon layer of this SOI substrate, insulation regions are produced outside the region provided for the transistor, contact layers and dielectric layers are applied over a highly doped emitter zone and over a highly doped collector zone produced by a mask technique and are structured, so that a trench is located over a base zone to be produced and in the middle between emitter zone and collector zone, an auxiliary layer is then conformally deposited surface-wide with constant thickness, as a result whereof the trench having the width is reduced to a gap having the width of the base zone to be produced, an implantation of dopant for the operational sign of the conductivity of the base is undertaken through this gap, the regions situated laterally relative to this base zone are shielded by the vertical portions of the auxiliary layer that cover the sidewalls of the trench, via holes are then etched into the auxiliary layer and into the dielectric layer and metal contacts are produced for the electrical connection of emitter, collector and base.

REFERENCES:
patent: 4545113 (1985-10-01), Vora
patent: 4922315 (1990-05-01), Vu
patent: 5070030 (1991-12-01), Ikeda et al.
patent: 5073506 (1991-12-01), Maszara et al.
patent: 5102812 (1992-04-01), Caneau et al.
patent: 5164326 (1992-11-01), Foerstner et al.
patent: 5273915 (1993-12-01), Hwang et al.
T. Sugii et al., "A New SOI-Lateral Bipolar Transistor for High-Speed Operation", Jap. J. Appl. Phy. 30, L2080-L2082 (1991).

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