Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Tunneling through region of reduced conductivity
Patent
1995-11-01
1998-02-03
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Tunneling through region of reduced conductivity
257 30, 505193, 505237, H01L 2906
Patent
active
057147671
ABSTRACT:
For manufacturing a superconducting device, a compound layer which is composed of the same constituent elements of an oxide superconductor is formed on a surface of the substrate, and a gate electrode is formed on a portion of the compound layer. Portions of the compound layer at both sides of die gate electrode are etched using die gate electrode as a mask, so that a shallow step is formed on an upper surface of the compound layer and side surfaces of the step exposed. After that electric power is applied to the gate electrode to heat the gate electrode so as to carry out a heat-treatment on the portion of die compound layer under the gate electrode locally, so that a gate insulator formed directly under the the gate electrode and a superconducting channel which is constituted an extremely thin superconducting region composed of the oxide superconductor and formed under die gate insulator are produced in a self alignment to die gate electrode.
REFERENCES:
patent: 4984036 (1991-01-01), Sakamoto et al.
patent: 5096882 (1992-03-01), Kato et al.
Yoshida et al, "Monolithic Device Fabrication Using High-TC Superconductor", IEDM Technical Digest, IEDM, 1988 pp. 282-285.
Iiyama Michitomo
Inada Hiroshi
Nakamura Takao
Crane Sara W.
Sumitomo Electric Industries Ltd.
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