Time-shared sample and hold circuit

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

358 10, 358 27, 358168, H04N 702, H04N 962

Patent

active

041352092

ABSTRACT:
Circuitry implementing at least two amplitude level detectors and a method for monitoring their ability to track rapid changes in signal level is shown. The monitoring circuit uses a delay network to provide an indication that the detectors have not been driven into conduction during a specific interval of time. If this operation persists, a resetting circuit discharges the detector output filter network, thereby allowing the detectors to re-establish an output indicative of the present input signal level. A commutating circuit is shown which allows a single delay network to be used in conjunction with at least two level detectors.

REFERENCES:
patent: 3659044 (1972-04-01), Olson
patent: 3792195 (1974-02-01), Wilson et al.
patent: 3920891 (1975-11-01), Rhee

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Time-shared sample and hold circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Time-shared sample and hold circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Time-shared sample and hold circuit will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-654441

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.