Architecture for providing input/output operations in a computer

Details Architecture for providing input/output operations in a computer Architecture for providing input/output operations in a computer

1996-11-19

1998-04-14

Shin, Christopher B.

395829, 395832, 395842, 395310, G06F 1206

Patent

active

057404640

ABSTRACT:
Hardware input/output address translation apparatus adapted for use in a multitasking computer system including hardware responsive to commands from an unprivileged application program addressed to an input/output address for translating the input/output address to a physical address space of an input/output device and transferring the command to the physical address of an input/output device, and additional hardware responsive to commands from an unprivileged application program addressed to an input/output address for selecting from safe translations of input/output addresses to physical address spaces of input/output devices for the hardware for translating the input/output address to a physical address space of an input/output device.

REFERENCES:
patent: 4777589 (1988-10-01), Boettner et al.
patent: 4959770 (1990-09-01), Kondo et al.
patent: 5127098 (1992-06-01), Rosenthal et al.
patent: 5220653 (1993-06-01), Miro
patent: 5347636 (1994-09-01), Ooi et al.
patent: 5426750 (1995-06-01), Becker et al.
patent: 5479627 (1995-12-01), Khalidi et al.

Affiliated with

Also associated with

Rating

Architecture for providing input/output operations in a computer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Architecture for providing input/output operations in a computer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Architecture for providing input/output operations in a computer will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-648350