Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1988-10-17
1990-01-23
Peng, John K.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358 22, 358158, 358903, H04N 504, H04N 974
Patent
active
048962147
DESCRIPTION:
BRIEF SUMMARY
The invention concerns a television receiver with a micro-computer controlled operating part and a switching network part and deflection stages. Both the micro-computer and the switching network part and the deflection stages necessitate a synchronization signal to ensure that the switching network part, which is often a blocking oscillator, can be synchronized at least with the line frequency or with a multiple thereof and that the deflection stages will be supplied with control signals derived therefrom. The syncrhonization frequency for the micro-computer must be generated with a quartz-stable oscillator that emits a frequency of 4 MHz for example. The switching network part itself uses an oscillator with a ceramic vibrator that emits a frequency of 500 KHz for example. RC or LC oscillators can also be used.
The frequency is divided to obtain the line frequency, which also controls the horizontal and vertical deflection stages.
The object of the invention is to decrease the expense of controlling the switching network part and deflection stages and of synchronizing the micro-computer. This object is attained by the invention recited in the major claim. Other advantageous embodiments of the invention will be evident from the subsidiary claims.
One embodiment of the invention will now be specified with reference to the drawing, which is a block diagram of the circuit components essential to the invention.
One function of a micro-computer 16 is to shape the remote-control signals received by a detector 2 in a television receiver into control signals that are either turned into analog control signals A in a digital-to-analog converter 3 or utilized by way of a bus line to control operation. Settings can be displayed on a digital or analog indicator 4. Micro-computer 16, a Hitachi HD 404 918 P, for example, requires a clock signal that matches its operating frequency, which is in this embodiment generated by a voltage-controlled oscillator (VCO) and supplied to micro-computer 16. The clock frequency is generated in the present embodiment in accordance with the known PLL technique by comparing it with a reference frequency in a frequency divider 6 that is part of a phase comparator 7. The television receiver also contains at least one frequency-and-phase synchronized oscillator to generate the signals that control switching network part 8, line deflection, and if necessary a vertical logic circuit 12. Vertical logic circuit 12 can be a countdown circuit for example. A circuit of this type is specified for example in German Patent 3 127 493. The present invention does not need the special oscillator usually required for this circuit because a clock-oscillator 5 in micro-computer 16 is also exploited to control switching network part 8 and deflection stages 10 and 11. Clock-oscillator 5 is for this purpose synchronized with the line frequency of the composite color-television signal. Since the composite-color signal arrives by way of an amplitude filter 9 at the phase comparator 7 in the PLL circuit, the frequency deriving from clock-oscillator 5 and divided by frequency divider 6 meshes into the composite-color line frequency.
A line-frequency sawtooth signal is shaped out of the line-frequency signal in a circuit 17 and supplied to the input terminal of a pulse-width modulator 15. The actual information U.sub.1 st obtained from switching network part 8 is applied to another input terminal of pulse-width modulator 15, and a pulse-width modulated signal that activates switching network part 8 is accordingly derived as a function of that information.
The signal from circuit 17 is also compared with line flyback ZR in a phase comparator 18 to obtain a signal for controlling deflection stage 10. The signals from stages 11, 15, and 18 are supplied to a switch 13 with three input terminals and three output terminals that can be switched on and off by means of a digital control signal. This switch can be the Motorola MC 14081 described on pages 5 to 150 of the handbook Semiconductor Library C-MOS, Vol. 5 (1976). It i
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Dieterle Franz
Geiger Erich
Hartmann Uwe
Mai Udo
Deutsche Thomson-Brandt GmbH
Fogiel Max
Peng John K.
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