Fishing – trapping – and vermin destroying
Patent
1993-01-15
1994-08-02
Fourson, George
Fishing, trapping, and vermin destroying
437 69, 437 70, 437984, H01L 2176
Patent
active
053345509
ABSTRACT:
An integrated circuit structure and process relating to a self-aligned window at the recessed junction of two insulating regions formed on the surface of a semiconductor body. The window may include a trench forming an isolation region between doped semiconductor regions, or may include an electrical conductor connected to a doped semiconductor region, or may include an electrical conductor separated from doped semiconductor regions by an electrical insulator. Embodiments include, but are not limited to, a field-effect transistor, a tunnelling area for a floating gate transistor, and an electrical connection to a doped area of the substrate.
REFERENCES:
patent: 5028559 (1991-07-01), Zdebel et al.
patent: 5120675 (1992-06-01), Pollack
Woll, S., Silicon Processing for the VLSI Era vol. 2: Process Integration, Lattice Press 1990 pp. 20-23.
Gill Manzur
Lin Sung-Wei
McElroy David J.
Donaldson Richard L.
Fourson George
Heiting Leo N.
Lindgren Theodore D.
Texas Instruments Incorporated
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