Frequency multiplier for use with CCD comb filter

Facsimile and static presentation processing – Static presentation processing – Attribute control

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328 16, 331 76, H04N 9535, H03B 1914

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042246385

ABSTRACT:
Frequency multiplier includes common-emitter input amplifying stage receiving fundamental frequency input signals at input transistor base. Output amplifying stage has output transistor with its base linked to input transistor collector, and with its collector coupled to narrow band load circuit tuned to a selected harmonic frequency. Emitter circuit of output transistor includes parallel resonant circuit tuned to input signal fundamental frequency. Non-linear negative feedback path between output transistor emitter and input transistor base includes capacitor in series with paralleled, oppositely poled diodes.

REFERENCES:
patent: 4019118 (1977-04-01), Harwood
patent: 4110784 (1978-08-01), Amery et al.
patent: 4130765 (1978-12-01), Arakelian
Transistor Circuit Design, section 23.2, "Frequency Doublers", pp. 326-328, Texas Instruments Inc., publ. by McGraw-Hill, 1963.

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