Registers – Coded record sensors – Particular sensor structure
Patent
1993-07-14
1998-04-14
Chan, Eddie P.
Registers
Coded record sensors
Particular sensor structure
39518801, 235492, G06F 1214
Patent
active
057404038
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to processes making it possible to protect integrated circuits against fraudulent use by unauthorized persons. It more particularly applies to integrated circuits for use in chip/smart cards, as well as specialized circuits known as ASIC, which often represent the essential feature for the performance characteristics of the equipment in which they are used. All these circuits have at least one memory and a varying number of logic circuits, which may extend to the formation of a micro-processor.
2. Description of the Prior Art
It is standard practice for chip card manufacturers to test the circuit and then prepersonalize it by entering into its memory a certain number of data more specifically defining its functions. In order to prevent fraudulent use, particularly in the case of theft during transportation between the manufacturer and the client, into said data is introduced a confidential code concealed among the other data. On receiving the card the customer, who has become aware of the confidential code in some other way, validates the latter by introducing the code into the card in accordance with a predetermined procedure.
It frequently arises that the card manufacturer is not the same as the circuit manufacturer and that these two manufacturers are based at locations remote from one another. It is therefore necessary to transfer a large number of circuits with a small volume, because they are not installed in the cards. The installation of the circuits in the cards is difficult, but does not lead to excessive problems and the personalization of the card is very simple, because the data written in the memory are not particularly confidential, because they are usually readable in cards regularly put into circulation. As for the test requirements, prior to installation and personalization, all the memory cells must be accessible in reading/writing, it is merely necessary to write the data into the same.
There is then a considerable risk of unauthorized user gaining possession of circuits and carrying out these operations in order to use the cards to his own advantage and in particular for acquiring the money to which they give access in plastic money uses. This risk increases in view of the fact that a single packet of circuits can have a very considerable exchange value. Therefore considerable precautions must be taken during such transportation processes and they lead to high costs and to significant delays.
SUMMARY OF THE INVENTION
In order to protect the circuits against such risks, the invention proposes a process for the protection of an integrated circuit against fraudulent use. The integrated circuit has a memory and logic circuits for controlling the memory. At the time of manufacture of the integrated circuit a physical determination is made, on the basis of the geometry of at least one of the circuit manufacturing masks, of the content of at least one secret address. The content represents a secret code making it possible to lock out at least the writing or at least the reading of at least part of the memory. In order to subsequently unlock the memory, reading is brought about of the secret code contained in the secret address, and a code identical to the logic control circuits is supplied for a comparison unlocking.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention is described in greater detail hereinafter with respect to the following description relative to the attached drawings, wherein:
FIG. 1 a partial, schematic diagram of an integrated circuit provided with the protection means according to the invention.
FIG. 2 a partial, schematic diagram of the memory and a register associated with a circuit according to the invention.
DETAILED DESCRIPTION OF THE INVENTION
The diagram according to FIG. 1 explains the process according to the invention and is unrelated with the physical reality of the elements forming the integrated circuit equipped with the protection means making it possible to perform the
REFERENCES:
patent: 4211919 (1980-07-01), Ugon
patent: 4446475 (1984-05-01), Gercekci et al.
patent: 4650975 (1987-03-01), Kitchener
patent: 5012074 (1991-04-01), Masada
patent: 5039850 (1991-08-01), Yamaguchi
patent: 5206938 (1993-04-01), Fujioka
patent: 5237609 (1993-08-01), Kimura
Chan Eddie P.
Gemplus Card International
Nguyen Hiep T.
Plottel Roland
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