Semiconductor memory device comprising capacitor portions having

Details Semiconductor memory device comprising capacitor portions having Semiconductor memory device comprising capacitor portions having

1990-04-20

1991-04-30

Hille, Rolf

357 45, 357 68, H01L 2968, H01L 2710, H01L 2348

Patent

active

050123092

ABSTRACT:
A dynamic random access memory comprises a semiconductor substrate of a first conductivity type, a plurality of work lines, a plurality of bit lines, a plurality of active regions and a plurality of memory cells. The word lines extend in a first direction on a major surface of the semiconductor substrate. The bit lines are formed on the word lines and extend in a second direction intersecting with the first direction. The plurality of active regions are formed spaced apart at least at a predetermined interval in a third direction intersecting with the first and the second directions. Each of the active regions substantially forms a plane rectangle. The memory cells are arranged at intersection points of the word lines and the bit lines. Each memory cell comprises one and the other impurity regions of a second conductivity type, a gate electrode connected to the word lines, a storage node and a cell plate. The storage node is in contact with the other impurity region and is located above the bit line. An active region constituting a memory cell can be formed with a simple pattern layout related to lattices comprising word lines and bit lines without using a complicated pattern layout, in order to arrange the bit lines in an lower layer portion of a capacitor.

REFERENCES:
patent: 4651183 (1987-03-01), Lange et al.
"A New Stacked Capacitor DRAM Cell Characterized by a Storage Capacitor on a Bit-line Structure", IEDM 1988, pp. 596-599 by Sin'ichiro Kimura, Yoshifumi Kawamoto, Tokuo Kure, Norio Hasegawa, Jun Etoh, Masakazu Aoki, Eiji Takeda, Hideo Sunami, and Kiyoo Itoh.

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