Data processing using interpolation of first and second informat

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371 377, 371 403, 371 4016, G11B 2018

Patent

active

057401870

ABSTRACT:
A data reproducing apparatus having: an error correcting circuit for correcting an error in an error correcting block in accordance with an error correcting code, the error correcting block including main information, at least one type of subsidiary information, an error detecting code at least for the main information, and the error correcting code for the main and subsidiary information and the error detection code; a flag memory circuit for storing an uncorrectable error flag to be set by the error correcting circuit for the at least one type of subsidiary information; a first interpolation circuit for interpolating the main information to correct an error in accordance with the decoding result by the error detecting code; and a second interpolation circuit for interpolating the at least one type of subsidiary information to correct an error in accordance with the uncorrected error flag stored in the flag memory circuit.

REFERENCES:
patent: 4882732 (1989-11-01), Kaminaga
patent: 4914527 (1990-04-01), Asai et al.
patent: 5148487 (1992-09-01), Nagai et al.
patent: 5239430 (1993-08-01), Koishikawa et al.
patent: 5309290 (1994-05-01), Sugiyama et al.
patent: 5311372 (1994-05-01), Matsumi et al.

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