Method of fabricating a submicron silicon gate MOSFETg21 which h

Details Method of fabricating a submicron silicon gate MOSFETg21 which h Method of fabricating a submicron silicon gate MOSFETg21 which h

1989-02-02

1990-01-23

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 41, 437 44, 437203, 437 29, 437984, 148DIG141, H01L 21265, H01L 21283, H01L 21316

Patent

active

048955205

ABSTRACT:
A method is disclosed for fabricating submicron silicon gate metal-oxide-semiconductor field effect transistors (MOSFETs) which have threshold and punchthrough implants that are self-aligned to the gate electrode and source and drain regions. A layer of dielectric material (12) is either deposited or grown on the surface of a substrate, and a trench (15), which defines the region of the MOSFET gate electrode, is formed in the dielectric layer. A gate oxide (16) is formed at the exposed substrate at the bottom of the trench, and an implant is performed into the silicon substrate wherever there is gate oxide, but not into the portion of the substrate covered by the original dielectric layer. A layer of polysilicon (20), preferably doped, or another metallic film is then deposited onto the surface. The polysilicon is etched back to the top surface of the dielectric layer, thereby leaving polysilicon in the trench to form the gate electrode (24). The dielectric layer (12) is then etched back preferentially to a thickness approximately equal to the thickness of the gate dielectric, and a high-dose implant is performed through the reduced thickness dielectric layer into the silicon substrate, except for the areas covered by the polysilicon gate to form the source and drain regions (30) of the MOSFET.

REFERENCES:
patent: 3481030 (1969-12-01), Te Velde et al.
patent: 3558366 (1971-01-01), Lepselter
patent: 4033026 (1977-07-01), Pashley
patent: 4212683 (1980-07-01), Jones et al.
patent: 4334348 (1982-06-01), Trenary et al.
patent: 4358340 (1982-11-01), Fu
patent: 4359816 (1982-11-01), Abbas et al.
patent: 4471522 (1984-09-01), Jambotkar
patent: 4514893 (1985-05-01), Kinsbron et al.
patent: 4536782 (1985-08-01), Brown
patent: 4599790 (1986-07-01), Kim et al.
patent: 4685196 (1987-08-01), Lee
patent: 4737828 (1988-04-01), Brown

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