Dynamically reprogrammable array logic system

Details Dynamically reprogrammable array logic system Dynamically reprogrammable array logic system

1980-12-29

1986-03-25

Shaw, Gareth D.

Boots, shoes, and leggings

G11C 1140

Patent

active

045787719

ABSTRACT:
A dynamically reprogrammable logic array including an AND array and an OR array having an output register at the output of the OR array. Commands stored in a load directory specify subarrays within an array for repersonalization. In addition to specifying subarrays, the commands specify an address in load storage containing the personality to be loaded into the subarrays. The load commands stored in the load directory are selectable by a microprocessor, another logic array or by the same logic array being repersonalized.

REFERENCES:
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patent: 4044338 (1977-08-01), Wolf
patent: 4056807 (1977-11-01), Thornber
patent: 4354228 (1982-10-01), Moore et al.
patent: 4409499 (1983-10-01), Zapisek et al.
H. Fleisher et al, An Introduction to Array Logic, published in IBM Journal of Research and Development, Mar. 1975, pp. 98-109.
J. C. Logue et al, Hardware Implementation of a Small System in Programmable Logic Arrays, published in IBM Journal of Research and Development, Mar. 1975, pp. 110-119.
J. W. Jones, Array Logic Macros, published in IBM Journal of Research and Development, Mar. 1975, pp. 120-126.

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