Fishing – trapping – and vermin destroying
Patent
1996-07-08
1997-07-29
Niebling, John
Fishing, trapping, and vermin destroying
437 44, 437 59, 437162, 148DIG9, H01L 21265
Patent
active
056521545
ABSTRACT:
In a method for manufacturing a "BiCMOS" semiconductor integrated circuit, a gate oxide film 110 and a polysilicon film are grown on a semiconductor substrate, and after phosphorus is doped, the polysilicon film is patterned to form gate electrodes 112a and 112b and an emitter electrode 112c. A heat treatment is performed to form an emitter diffused region 113. Phosphorus and boron are selectively implanted with a low impurity concentration, respectively, to form a LDD N.sup.- region 114 and a LDD P.sup.- region 115. Thereafter, a side wall 116 is formed, and boron is implanted into areas B and C so as to form P.sup.+ source/drain regions 117 and a graft base region 18, respectively. Phosphorus is implanted to form N.sup.+ source/drain regions 119.
REFERENCES:
patent: 4927776 (1990-05-01), Soejima
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 4965220 (1990-10-01), Iwasaki
patent: 5059549 (1991-10-01), Furuhata
NEC Corporation
Niebling John
Pham Long
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