Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1987-11-19

1989-10-31

Smith, Jerry

Excavating

371 3, G06F 1110

Patent

active

048782203

ABSTRACT:
For sufficient diagnostic operation, there is disclosed a semiconductor memory device having a write-in mode, a read-out mode and a diagnostic mode. The seminconductor memory device includes: (a) a check-bit producing circuit operative to produce check-bits based on data bits of a piece of data information supplied from the outside thereof in the write-in mode; (b) a plurality of memory cell groups each capable of storing the data bits of the piece of data information and the check bits produced by the check-bit producing circuit; (c) an error detecting circuit operative to identify at least one error bit opposite in logic level from the corresponding data bit on the basis of the piece of data information stored in the memory cell group and to produce an output signal consisting of a plurality of data bits and representing the error bitm, if any, in the read-out mode or the diagnostic mode; (d) an error correction circuit supplied with the data bits of the piece of data information stored in the memory cell group and the output signal produced by the error detecting circuit and operative to change the error data bit to the corresponding data bit in the read-out mode or the diagnostic mode; and (e) a test pattern producing circuit operative to produce dummy bits having an error data bit and check bits produced on the basis of the data bits without the error data bit and supplying the dummy bits to the error detecting circuit in the diagnostic mode, so that the diagnostic operations can be achieved for both of the error detecting circuit and the error correction circuit.

REFERENCES:
patent: 4531213 (1985-07-01), Scheuneman
patent: 4561095 (1985-12-01), Khan

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