Fishing – trapping – and vermin destroying
Patent
1994-11-29
1996-04-30
Fourson, George
Fishing, trapping, and vermin destroying
437 40, 437 41, 437174, 437907, 437186, 437 24, H01L 2184
Patent
active
055124941
ABSTRACT:
A thin film transistor having a staggered structure and manufactured by the method of the invention comprises a first amorphous silicon film of a uniform thickness including source and drain regions, a second amorphous semiconductor film acting as a channel layer, a gate insulating film and a gate electrode laminated on a glass substrate in this order. An interface between the semiconductor film and the gate insulating film is formed flat from the source region to the drain region through a channel region. The thin film transistor formed in a staggered structure features a uniform drain current distribution and a high carrier mobility which improve current drivability and LCD image quality when used in a LCD.
REFERENCES:
patent: 4375993 (1983-03-01), Mori et al.
patent: 5254208 (1993-10-01), Zhang
patent: 5328861 (1994-07-01), Miyakawa
patent: 5372958 (1994-12-01), Miyasaka et al.
"Excimer Laser Annealed poly-Si TFTs for CMOS Circuits", by Sera et al., Extended Abstracts of the 1991 International Conference on Solid State Devices and Materials, Yokohama, 1991, pp. 590-592.
Booth Richard A.
Fourson George
NEC Corporation
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